S1C17501 seiko epson corporation cmos 16-bit application specific controller the S1C17501 is a high performance and compact 16-bit risc application specific controller (asc). it is suitable for various products that require analog inputs and interfaces for connection, such as healthcare goods, sensor systems, alarms, home electric appliance (rice cookers, microwave ovens and remote controllers). the S1C17501 consists of a s1c17 16-bit compact risc cpu core, a 128k- or 96k-byte flash eeprom, a 4k-byte ram, a 2k-byte battery backup ram, a 10-bit adc with eight analog input channels, a usb fs-device controller, a pwm control capture timer/counter, an infrared remote controller, serial interfaces (uart with irda 1.0, spi, i 2 c, and i 2 s), an rtc driven with an independent power supply, 16-bit and 8-bit timers, a watchdog timer, a nand flash card interface, an external bus with an sram controller and gpio ports. the usb fs-device controller may be used not only for communication with pcs but also for on-board firmware update. the S1C17501 provides a 16 bits 16 bits + 32 bits mac (multiply and accumulate) instruction to implement a dsp function. furthermore, an external audio adc/dac may be connected via the built-in i 2 s interface, this makes it possible to input/output adpcm sound/voice data. the S1C17501 has adopted the epson soc (system on chip) design technology using 0.35 m mixed analog low power cmos pro cess . product lineup model no. flash rom size ram size packa g e S1C17501f01 96k b y tes 4k + 2k * b y tes tqfp14-100 p in S1C17501f02 128k bytes 4k + 2k * bytes tqfp15-128pin ? the 2k-byte ram is configurable as separated power with battery backup. this product uses superflash ? technology licensed from silicon storage technology, inc. features ? 0.35 m al-4-layers mixed analog low power cmos process technology cpu ? seiko epson original 16-bit risc processor s1c17 core ? internal 3-stage pipeline ? instruction set - 16-bit fixed length - 111 basic instructions (184 including variations) - compact and fast instruction set optimized for development in c language ? registers - eight 24-bit general-purpose registers - three special registers (24-bit 2, 8-bit 1) ? memory space - up to 16m bytes accessible (24-bit address)
S1C17501 2 epson internal memories ? flash eeprom - 128k bytes (S1C17501f0a) - 96k bytes (S1C17501f1a) ? ram - 4k bytes - 2k bytes (with battery backup feature) operating clock ? main clock - 48 mhz when the usb function is used - 1 to 48 mhz (can be divided by 1 to 32) or 32.768 khz when the usb function is not used - on-chip oscillator (crystal or ceramic) or external clock input ? sub clock - 32.768 khz (typ.) for the rtc - on-chip oscillator (crystal) sram controller ? provides a 23-bit external address bus, an 8- or 16-bit width selectable data bus, and four chip enable signals to support a maximum of 15m-byte external memory space. interrupt controller ? four non-maskable interrupts - reset (#reset pin or watchdog timer) - address misaligned - debug - nmi (#nmi pin or watchdog timer) ? 27 maskable interrupts - port inputs (eight systems) - pwm control capture timer/counter (one system) - a/d converter (two systems) - 16-bit timer of clock generator (one system) - 8-bit timers of clock generator (two systems) - uart (one system) - spi (two systems) - i 2 c (one system) - rtc (one system) - 8-bit timers (four systems) - usb function controller (one system) - i 2 s (two systems) - remote controller (one system) - the interrupt level (priority) of each maskable interrupt system is configurable (levels 0 to 7). prescaler ? generates the source clocks for the clock generator. pwm control capture timer/counters ? one channel of 16-bit timer/counter with pwm output function is available. ? can generate two compare-match interrupts. ? supports the igbt output control function using the a/d converter out-of-range signal. clock generator ? one channel of 16-bit timer and two channels of 8-bit timers are available. ? can be used as the clock source for the uart, spi, and i 2 c. ? each timer can generate an underflow interrupt.
S1C17501 epson 3 8-bit timers ? four channels of 8-bit timers (presettable down counter) are available. ? can be used as an interval timer to trigger the adc. ? each timer can generate an underflow interrupt. watchdog timer ? 30-bit watchdog timer to generate a reset or an nmi ? the watchdog timer overflow period (reset or nmi interrupt period) is programmable. ? the watchdog timer overflow signal can be output outside the ic. rtc ? contains time counters (second, minute, and hour) and calendar counters (day, day of the week, month, and year). ? the power source separated with the system power supply (v dd ) can be used. ? provides the wakeup output pin and #stby input pin to control standby mode. ? periodic interrupts are possible. uart ? one channel of uart is available. ? supports irda 1.0 interface. ? two-byte receive data buffer and one-byte transmit buffer are built in to support full-duplex communication. ? transfer rate: 150 to 115200 bps, character length: seven or eight bits, parity mode: even, odd, or no parity, stop bit: one or two bits ? parity error, framing error, and overrun error detectable ? each channel can generate receive buffer full, transmit buffer empty, and receive error interrupts. spi ? supports both master and slave modes. ? one-byte receive data buffer and one-byte transmit buffer are built in. ? data length: eight bits fixed (msb first) ? data transfer timing (clock phase and polarity variations) is selectable from among 4 types. ? can generate receive buffer full and transmit buffer empty interrupts. extended spi ? supports both master and slave modes. ? one-byte receive data buffer and one-byte transmit buffer are built in. ? data length: eight bits fixed (msb first) ? data transfer timing (clock phase and polarity variations) is selectable from among 4 types. ? can generate receive buffer full and transmit buffer empty interrupts. ? exclusive clock source is available. i 2 c ? supports master mode only. ? data format: 8 bits (msb first) ? addressing mode: 7-bit addressing (10-bit addressing is not supported.) ? supports the noise reject function controlled by a register. ? can generate an i 2 c interrupt. i 2 s ? supports universal audio i 2 s bus interface. ? one i 2 s output channel in 24-bit resolution and one i 2 s input channel in 16-bit resolution ? operates as the master to generate the bit clock, word-select signal, data and master clock. ? can generate an i 2 s interrupt.
S1C17501 4 epson usb function controller ? supports usb2.0 full speed (12m bps) mode. ? supports auto negotiation function. ? scratch and variable bulk end point size ? embedded 1k-byte programmable fifo ? can generate a usb interrupt. card interface ? generates 8- or 16-bit nand flash interface signals. ? the ecc function should be implemented in the application program. infrared remote controller ? outputs a modulated carrier signal and inputs remote control pulses. ? embedded carrier signal generator and data length counter. ? can generates remc interrupts. general-purpose i/o ports ? maximum 91 i/o ports and eight input ports are available. ? can generate input interrupts from the eight ports selected with software. ? the gpio ports are shared with other peripheral function pins (uart, pwm etc.). therefore, the number of gpio ports depends on the peripheral functions used. a/d converter ? 10-bit a/d converter with up to eight analog input ports ? can generates an end of conversion interrupt and an out of range interrupt. ? outputs an out of range signal to the igbt circuit in the pwm control capture timer/counter module. operating voltage ? v dd : 3.00 to 3.60 v (3.3 v typ.) ? rtcv dd : 3.00 to 3.60 v (3.3 v typ.) ? av dd (i/o): 2.70 to 5.50 v i / o i n t e r f a c e v o l t a g e ? v dd (41 gpio support -0.3 to 5.8 v input voltage.) power consumption ? d u r i n g slee p : 4 . 5 w ( t y p . ) ? during halt: 53 mw(typ.) in 48 mhz/3.3 v operation ? during execution: 116 mw(typ.) in 48 mhz/3.3 v operation ? battery backup power: 0.28 w(typ.) 3.3 v, osc1 deactivated ? by controlling the clocks through the clock-gear (cmu), power consumption can be reduced. shipping form ? plastic package: tqfp14-100pin (12 mm 12 mm 1.2 mm, 0.4 mm pin pitch) tqfp15-128pin (14 mm 14 mm 1.2 mm, 0.4 mm pin pitch) operating temperatures ? during f l a sh r e ad : ? during f l as h w ri te : ? during t he us e of u s b : -40 to 85? -40 to 70? 0 to 70 ?
S1C17501 epson 5 block diagram cpu core s1c17 iram (4k bytes) iram2 (2k bytes) mac (dsp) sram controller flash eeprom (128k/96k bytes) interrupt system rtcv dd rtcv dd i 2 c clock generator prescaler interrupt controller uart spi i/o 1 (0x4000? i/o 2 (0x4400? i/o port/ i/o mux dclk, dsio, dst2 osc1?, osc3?, cmu_clk sin0, sout0, #sclk0 i2c_sda, i2c_scl spi_sdi0, spi_sdo0, spi_sck0, #spi_ssi0 usbdp, usbdm, usbvbus, puenb wdt_clk, #wdt_nmi wakeup, #stby p00?7, p10?6, p20?7, p30?2, (p33?4), p35?7, p40?5, p50?3, (p54?7), p60?7, p70?7, p80?6, p90?7, pa0?5, (pa6), pb0?7, (pc0?7) tvep #reset #nmi #ce0?, #rd, #wrl, (#wrh), #bsl, (#bsh), #wait a0?8, (a19?2), d0?, (d8?5) ain0?, #adtrg remc_in, remc_out #smrd, #smwr spi_sdi1, spi_sdo1, spi_sck1, #spi_ssi1 tm0, #tm0, pwmprt0 i2s_sdo0, i2s_ws0, i2s_sck0, i2s_mclk0, i2s_sdi1, i2s_ws1, i2s_sck1, i2s_mclk1 test v dd av dd rtcv dd v ss extended spi clock management unit 16-bit multi-function timer watchdog timer i 2 s 8-bit timer a/d converter usb function controller remote controller rtc card interface the pins enclosed in brackets ( ) are available only for the tqfp15-128pin package model. (they are not provided in the tqfp14-100pin package model.)
S1C17501 6 epson pin layout diagram tqfp14-100pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 usbvbus puenb usbdp usbdm v ss v dd (a0/#bsl) p60 (a1) p61 (a2) p62 (a3) p63 (a4) p64 v ss (a5) p65 (a6) p66 (a7) p67 (a8) p70 (a9) p71 (a10) p72 v dd (a11) p73 (a12) p74 (a13) p75 (a14) p76 (a15) p77 (a16) p80 av dd p00 (ain0) p01 (ain1) p02 (ain2) p03 (ain3) p04 (ain4) p05 (ain5) p06 (ain6) p07 (ain7) v ss p97 (d7) p96 (d6) p95 (d5) p94 (d4) p93 (d3) p92 (d2) p91 (d1) p90 (d0) v dd p32 (wdt_clk/#wdt_nmi/cmu_clk) pa5 (#wrl) pa4 (#rd) pa3 (#ce3) pa2 (#ce2) pa1 (#ce1) 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 pa0 (#ce0) p51 (i2c_scl) p50 (i2c_sda/excl0) p42 (#sclk0/excl0) p41 (sout0/#smwr) p40 (sin0/#smrd) #nmi v dd #reset tvep p23 (i2s_mclk0) p22 (i2s_sck0) p21 (i2s_ws0) p20 (i2s_sdo0) v ss osc4 osc3 v dd p53 (remc_out) p52 (remc_in/#tm0) osc2 osc1 rtcv dd wakeup #stby (spi_sdi0) p10 (spi_sdo0) p11 (spi_sck0) p12 (#spi_ssi0/#spi_ssi1/spi_sdi0) p13 (spi_sdi1) p14 (spi_sdo1) p15 (spi_sck1) p16 (remc_in/pwmprt0) p43 v ss (remc_out) p44 (#wait) p45 (i2s_sdi1) p24 (i2s_ws1) p25 (i2s_sck1) p26 (i2s_mclk1) p27 test v dd (tm0) p30 (#tm0/#adtrg) p31 (p37) dst2 (p36) dsio v ss (p35) dclk (a17) p81 (a18) p82
S1C17501 epson 7 tqfp15-128pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 usbvbus puenb usbdp usbdm v ss v dd (a0/#bsl) p60 (a1) p61 (a2) p62 (a3) p63 (#wrh/#bsh) pa6 (excl0) p54 p55 (a4) p64 v ss (a5) p65 (a6) p66 (a7) p67 (a8) p70 (a9) p71 (a10) p72 (d12) pb4 (d13) pb5 (d14) pb6 (d15) pb7 v dd (a11) p73 (a12) p74 (a13) p75 (a14) p76 (a15) p77 (a16) p80 av dd p00 (ain0) p01 (ain1) p02 (ain2) p03 (ain3) p04 (ain4) p05 (ain5) p06 (ain6) p07 (ain7) v ss pc1 (#wdt_nmi) pc0 (cmu_clk) p56 (#tm0) p97 (d7) p96 (d6) p95 (d5) p94 (d4) p93 (d3) p92 (d2) p91 (d1) p90 (d0) pb3 (d11) pb2 (d10) pb1 (d9) pb0 (d8) v dd p32 (wdt_clk/#wdt_nmi/cmu_clk) pa5 (#wrl) pa4 (#rd) pa3 (#ce3) pa2 (#ce2) pa1 (#ce1) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 pa0 (#ce0) p51 (i2c_scl) p50 (i2c_sda/excl0) p42 (#sclk0/excl0) p41 (sout0/#smwr) p40 (sin0/#smrd) pc7 pc6 pc5 pc4 #nmi v dd #reset tvep p23 (i2s_mclk0) p22 (i2s_sck0) p21 (i2s_ws0) p20 (i2s_sdo0) p34 (#smwr) p33 (#smrd/#tm0) v ss v ss osc4 osc3 v dd p53 (remc_out) p52 (remc_in/#tm0) osc2 osc1 rtcv dd wakeup #stby (spi_sdi0) p10 (spi_sdo0) p11 (spi_sck0) p12 (#spi_ssi0/#spi_ssi1/spi_sdi0) p13 (spi_sdi1) p14 (spi_sdo1) p15 (spi_sck1) p16 (remc_in/pwmprt0) p43 v ss (remc_out) p44 (#wait) p45 p57 (#adtrg) pc2 (pwmprt0) pc3 (i2s_sdi1) p24 (i2s_ws1) p25 (i2s_sck1) p26 (i2s_mclk1) p27 test v dd (tm0) p30 (#tm0/#adtrg) p31 (a19) p83 (a20) p84 (a21) p85 (a22/cmu_clk) p86 (p37) dst2 (p36) dsio v ss (p35) dclk (a17) p81 (a18) p82
http://www.epson.jp/device/semicon_e S1C17501 notice: no part of this material may be reproduced or duplicated in any form or by any means without the written permission of seiko epson. seiko epson reserves the right to make changes to this material without notice. seiko epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material wil l be free from any patent or copyright infringement of a third party. this material or portions thereof may contain technology or the subject relating to strategic products under the control of the foreign exchange and foreign trade law of japan and may require an export license from the ministry of economy, trade and industry or other approval from another government agency. ? this product uses superflash ? technology licensed from silicon storage technology, inc. ? seiko epson corporation 2008, all right reserved. seiko epson corporation epson electronic devices website semiconductor operations div ision ic sales dept. i c int e r n a t ion a l s a l e s g r ou p d o c ume n t c ode : 4 11 0 25 5 0 4 421-8, hino, hino-shi, tokyo 191-8501, japan first issue may, 2007 p ho n e : + 8 1 - 4 2 - 58 7 - 5814 f ax : + 8 1 - 4 2 - 58 7 - 511 7 p r i n te d m a r c h , 2 00 8 i n j apan h
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